1 files changed, 0 insertions, 39 deletions
diff --git a/system/xen/xsa/xsa333.patch b/system/xen/xsa/xsa333.patch
deleted file mode 100644
index 6b86c942fa..0000000000
--- a/system/xen/xsa/xsa333.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From: Andrew Cooper <andrew.cooper3@citrix.com>
-Subject: x86/pv: Handle the Intel-specific MSR_MISC_ENABLE correctly
-
-This MSR doesn't exist on AMD hardware, and switching away from the safe
-functions in the common MSR path was an erroneous change.
-
-Partially revert the change.
-
-This is XSA-333.
-
-Fixes: 4fdc932b3cc ("x86/Intel: drop another 32-bit leftover")
-Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
-Reviewed-by: Jan Beulich <jbeulich@suse.com>
-Reviewed-by: Wei Liu <wl@xen.org>
-
-diff --git a/xen/arch/x86/pv/emul-priv-op.c b/xen/arch/x86/pv/emul-priv-op.c
-index efeb2a727e..6332c74b80 100644
---- a/xen/arch/x86/pv/emul-priv-op.c
-+++ b/xen/arch/x86/pv/emul-priv-op.c
-@@ -924,7 +924,8 @@ static int read_msr(unsigned int reg, uint64_t *val,
-         return X86EMUL_OKAY;
- 
-     case MSR_IA32_MISC_ENABLE:
--        rdmsrl(reg, *val);
-+        if ( rdmsr_safe(reg, *val) )
-+            break;
-         *val = guest_misc_enable(*val);
-         return X86EMUL_OKAY;
- 
-@@ -1059,7 +1060,8 @@ static int write_msr(unsigned int reg, uint64_t val,
-         break;
- 
-     case MSR_IA32_MISC_ENABLE:
--        rdmsrl(reg, temp);
-+        if ( rdmsr_safe(reg, temp) )
-+            break;
-         if ( val != guest_misc_enable(temp) )
-             goto invalid;
-         return X86EMUL_OKAY;